1. Field of the Invention
The present invention relates to a data processing apparatus and method. More particularly, the present invention relates to a data processing apparatus operable to latch processor state information associated with a data processing instruction being executed by a processing unit, and a mechanism for providing that processor state information for diagnostic purposes.
2. Description of the Prior Art
When performing diagnostic operations, such as debugging, on a data processing apparatus executing data processing instructions, it is often useful to know which instructions within software code being tested are being executed. Many techniques exist to enable such diagnostic operations.
One known technique is to provide data capturing hardware on the relevant buses within the data processing apparatus and to generate a trace output of every single instruction that is executed as a stream of real-time data. The problem with this approach is that high speed and expensive memories are needed to store the very large quantities of data generated. Typically, with this arrangement only small time periods can be fully monitored due to the limited storage capacity of such memories.
Another technique is known as profiling in which a program counter value is periodically sampled to provide statistical information on the program counter value during the execution of the data processing instructions.
In one profiling technique an interrupt signal is provided to the processor unit, which causes interrupt code to be executed which outputs the value of a program counter register at the point that the interrupt occurred. A problem with this approach is that interrupting the processor unit can disturb the true real-time behaviour of the processor unit, and in some circumstances can produce unrepresentative results.
Another profiling technique is disclosed in U.S. Pat. No. 6,598,150, filed by a common assignee, the contents of which are incorporated by reference. This technique enables program counter values to be provided from a processor core to diagnostic hardware and latched therein. The diagnostic hardware is responsive to a program counter request signal from an external diagnostic system. The diagnostic hardware transfers a program counter value into a scan chain from where it can be provided to the diagnostic system. It will be appreciated that this technique enables the operation of the diagnostic system to be de-coupled from that of the processor core, thereby enabling real time operation of the processor core. Hence, the external diagnostic system can asynchronously sample the program counter value of a processing system under test.
It is desired to provide an improved diagnostic technique.